Prof. Piotr Dudek is is a Professor of Circuits and Systems in the School of Electrical and Electronic Engineering, The University of Manchester, leading the Microelectronics Design Lab.
He received his mgr inz degree from the Technical University of Gdansk, Poland, and the MSc and PhD degrees from the University of Manchester Institute of Science and Technology (UMIST) in 1996 and 2000 respectively. He worked as a Research Associate, and since 2002 as a Lecturer, at UMIST/The University of Manchester. He was a Visiting Associate Professor in the Department of Electronic and Computer Engineering at the Hong Kong University of Science and Technology during 2008/09, Visiting Professor in the Faculty of Electronics, Telecommunications and Informatics at the Gdansk University of Technology in 2015, Royal Academy of Engineering/Leverhulme Trust Senior Research Fellow in 2016/17, and a visiting researcher at the Sorbonne University in 2017/18.
He is a Senior Member of the Institute of Electrical and Electronic Engineers (IEEE) and a member of IEEE Circuits and Systems Society Technical Committees on Neural Systems, and on Cellular Neural Networks and Array Processing. He was the Chair of the IEEE CAS Technical Committee on Sensory Systems (2015-17). He has been a member of Scientific Committees, Track Chair or Session Chair at many international conferences. He is an Associate Editor for IEEE Transactions on Circuits and Systems II and Review Editor for Frontiers in Neuroscience and an active reviewer for many journals and funding agencies. His work received several Best Paper and Best Demo awards at international conferences (ISCAS, IJCNN, CNNA, ICDSC), and he has given numerous keynote and invited talks, and examined PhD theses worldwide.
Dirk Koch is a Senior Lecturer at the University of Manchester. His group works on run-time reconfigurable systems based on FPGAs ranging from embedded systems to HPC. He developed techniques and tools for self-adaptive distributed embedded control systems based on FPGAs. Current research projects include hardware security database acceleration using FPGAs-based stream processing, HPC and exascale computing, as well as reconfigurable instruction set extensions for CPUs. Furthermore, in the FORTE project he is exploring how memristors can be used for building new kinds of analogue, digital and mixed-signal reconfigurable devices.
Dirk is author of the book "Partial Reconfiguration on FPGAs" and a co-editor of the book "FPGAs for Software Programmers" and his group is developing and maintaining the GoAhead framework that provides unique capabilities for building run-time reconfigurable systems. Recent awards include the FPL Community Award (2016) and the FPL most influential paper award (2015).
Nguyen received his Bachelor degree from The University of Technology, Vietnam in 2007. He worked as a hardware design engineer at Renesas Electronics from 2007 to 2010. He then obtained his Master degree from Western Sydney University in 2012 and PhD from The University of Sydney, Australia in 2017. He currently is a Research Associate at the APT Group, The School of Computer Science, The University of Manchester. His research interests include ASIC/FPGA design, device characterisation and modelling.
The promising advantages of functional oxides, as researched in FORTE, could offer great opportunities to overcome the limitations in power, density and performance of reconfigurable fabrics. Our research is to exploit functional oxides to develop hardware architecture and design flow for a digital reconfigurable fabric. The current research is focusing on investigating memristor-based building blocks for reconfigurable FPGAs. These will then be used to develop a full memristor-based design flow for reconfigurable FPGAs
Jing received his Bachelor of Science degree from HKBU in 2011. Then he completed his Master of Engineering in 2013 and PhD in 2019 at RMIT University, Australia. He is currently working as a research associate at Department of Computer Science, The University of Manchester.
The current research is focusing on the development of memristor-based FPGA architecture. His research interest includes FPGA design, embedded systems and asynchronous logic.
Jianing Chen received a B.Eng.(Hons) degree in automatic control and systems engineering from the University of Sheffield, UK, in 2010, and completed his Ph.D. degree in systems and control engineering at the same institution, in 2015.
At present, he is working at the Micro-eletronics Design Lab, the University of Manchester.
His research interests lie in computer vision, self-organizing systems, and computational intelligence.