Memory compilers are necessary tools to boost the design procedure of digital circuits. However, only a few are available to academia. Resistive Random Access Memory (RRAM) is characterised by high density, high speed, non volatility and is a potential candidate of future digital memories. To the best of the authors' knowledge, this paper presents the first open source RRAM compiler for automatic memory generation including its peripheral circuits, verification and timing characterisation. The RRAM compiler is written with Cadence SKILL programming language and is integrated in Cadence environment. The layout verification procedure takes place in Siemens Mentor Calibre tool. The technology used by the compiler is TSMC 180nm. This paper analyses the novel results of a plethora of M x N RRAMs generated by the compiler, up to M = 128, N = 64 and word size B = 16 bits, for clock frequency equal to 12.5 MHz. Finally, the compiler achieves density of up to 0.024 Mb/mm2.
To the best of the authors' knowledge, this paper presents the first open source RRAM compiler for automatic memory generation including its peripheral circuits, verification and timing characterisation.
Papers
- D. Antoniadis, P. Feng, A. Mifsud, and T. G. Constandinou, ‘Open-Source Memory Compiler for Automatic RRAM Generation and Verification’, in 2021 IEEE International Midwest Symposium on Circuits and Systems (MWSCAS), Aug. 2021, pp. 97–100. doi: 10.1109/MWSCAS47672.2021.9531908.
- Antoniadis, A. Mifsud, P. Feng, and T. G. Constandinou, ‘An Open-Source RRAM Compiler’. arXiv, May 31, 2022. doi: 10.48550/arXiv.2111.05463.
For Access to the files, see the GitHub repository: /akdimitri/RRAM_COMPILER
